Detailed Drawings

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 1: Picture of the FPGA and board that we are developing on

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

Figure 2: Layout of the system, primarily focusing on the event detector

 

 

 

 

 

 

 

Figure 3: A Picture of the Graphical User Interface Layout