High Speed Event Detector

Capstone 2010!

Project Description:

MSU is currently developing a radiation tolerant computer system for the NASA Marshall Space Flight Center under the Reconfigurable Computing task.  This computer system is implemented on an FPGA and has the ability to spatially relocated soft processors to avoid and recover from radiation strikes.  A sensor has been developed with provides the XY location of radiation strikes to the FPGA-based computer.  In this project, the 2-3 student team will design a high speed event detector circuit which will be able to capture signals coming out of the radiation sensor and store the information for use by the FPGA-based computer.  The signals coming out of the sensor are pulses as short as 5ns and can occur within 2ns of each other.  The sensor has 20 signal lines that must be acquired.  The event detector needs to have the ability to capture and store back-to-back radiation strikes across all 20 lines.  The capstone team will need to provide a design which can meet the above requirements in the most cost effective manner within a 15 week design cycle.  The team must also develop a way to graphically observe the occurrence of radiation strikes using a GUI.

Sponsors: Dr. Brock LaMeres and NASA Higher Education Office
Project Advisor:  Dr. Brock LaMeres